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We provide a detailed description and characterization of all PARSEC workloads in a technical report.
The PARSEC Benchmark Suite: Characterization and Architectural Implications |
[ BIBTEX ] |
Christian Bienia, Sanjeev Kumar, Jaswidner Pal Singh and Kai Li. Technical Report TR-811-08, Princeton University, January 2008. |
[ PDF ] |
A more compact version of the technical report can also be obtained as a publication. Additional documentation is furthermore available from Cornell University:
A Characterization of the PARSEC Benchmark Suite for CMP Design |
[ BIBTEX ] |
Major Bhadauria, Vince Weaver and Sally A. McKee. Technical Report CSL-TR-2008-1052, Cornell University, September 2008. |
[ PDF ] |
The University of Texas at Austin has released a full disk image with Alpha binaries of PARSEC for the M5 simulator. Detailed instructions on the process are available in the following tech report:
Running PARSEC 2.1 on M5 |
[ BIBTEX ] |
Mark Gebhart, Joel Hestness, Ehsan Fatehi, Paul Gratz, Stephen W. Keckler. Technical Report TR-09-32, University of Texas at Austin, Department of Computer Science, October 2009. |
[ PDF ] |
The man pages that are part of the PARSEC distribution are also available as an HTML version.
http://parsec.cs.princeton.edu/doc/man/
The PARSEC Wiki offers a wealth of practical information related to PARSEC. Users of the benchmark suite are invited to publish patches, tools and other contributions through the wiki.
http://wiki.cs.princeton.edu/index.php/PARSEC
We have presented several tutorials on PARSEC at major computer architecture conferences since the first release of our benchmark suite. The last one was given at HPCA-15 in Raleigh. The used material is made available below.
The PARSEC Benchmark Suite Tutorial |
A tutorial covering the practical aspects of PARSEC 2.0 |
[ PDF ] [ ODP ] |
There are several other useful benchmarks
BigDataBench |
A Big Data Benchmark Suite, ICT, Chinese Academy of Sciences |
There are other extensions for PARSEC
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